It is well known in the art to use a driver circuit to drive a load. The driver circuit may comprise a high side driver circuit including a drive transistor coupled between a high supply voltage node and the load (with the load coupled between the drive transistor and a low supply voltage node, such as ground). The driver circuit may alternatively comprise a low side driver circuit including a drive transistor coupled between the load and the low supply voltage node (with the load coupled between the high supply voltage node and the drive transistor). In another known configuration, the load is driven from both the high side and the low side by separate driver circuits (high side and low side, respectively).
In order to satisfy concerns with electromagnetic interference (EMI) arising from the switching operation of the driver circuit(s) coupled to the load, it is important to control the slew rate for turning on and off of the drive transistor. This can be accomplished by limiting the charge/discharge current at the control node of the drive transistor.
It is further desired in the art to minimize the on/off delay of the driver circuit. This can be accomplished by using large charge/discharge currents at the control node of the drive transistor.
Prior art driver circuits use a single fixed current which is applied for both charge and discharge of the control node of the drive transistor. Finding a single fixed current which satisfies concerns with electromagnetic interference and minimizes on/off delay is challenging. Oftentimes, such a current can be found which satisfies both requirements when turn on the drive transistor (charge of the control node), but falls short with respect to turning off the drive transistor (discharge of the control node).
In one prior art solution shown in FIG. 1, the driver circuit functions (in a high side driver implementation) to detect with the circuitry generally indicated at reference 10 a gate-to-source voltage (Vgs) of the drive transistor 12 and provide a boosted discharge current Id (i.e., a discharge current in excess of the charge current Ic) to the gate of the drive transistor 12 if the detected Vgs exceeds twice the threshold voltage of the drive transistor.
In another prior art solution shown in FIG. 2, the driver circuit functions (in a high side driver implementation) to detect with a comparator circuit 14 a gate-to-drain voltage (Vgd) of the drive transistor and provide a boosted discharge current Id (i.e., a discharge current in excess of the charge current Ic) to the gate of the drive transistor 12 if the detected Vgd exceeds zero.
Both of the prior art solutions disadvantageously draw extra current from the driver circuit high supply voltage node (Vcp) and implement a digitally switched on/off current (driven by the circuitry generally indicated at reference 16). The prior art solutions also utilize high voltage components that occupy large circuit integration areas. There is a need in the art for an improved driver circuit which does not suffer from the current and switching problems associated with the prior art solutions of FIGS. 1 and 2. In addition, there would be an advantage to provide a circuit that occupies a reduced circuit integration area.